Source-Drain Deposition Mask, High Density
Fast and secure
Shadow masks for deposition of source-drain contacts. Designed for use in the Evaporation Stack for High Density OFETs with our standard sized substrates of 20 x 15 mm. Each mask produces 20 OFETs on a single substrate. We sell a selection of masks for different precisions in linear and interdigitated patterns.
If you would like to mix and match geometries, please contact us.
General Mask Specifications
|Mask dimensions||20 x 15 mm|
|Number of OFETs||20|
|Contact pad size||1 mm x 1 mm|
|Contact pitch||2.54 mm (0.1")|
|Mask material||Electroformed nickel|
Individual Mask Specifications
|Channel Width||1 mm||1 mm||18.23 mm|
|Channel Length||30 µm||30, 40, 50, 60, 80 µm (4 of each)||50 µm|
|Tolerance||± 7 µm||± 7 µm||± 7 µm|
|Mask Thickness||30 µm||30 µm||30 µm|
Linear 1 mm x 30 µm (E321) and 1 mm x 30 µm variable (E322)
Interdigitated 18 mm x 50 µm (E323)
PLEASE NOTE: The magnetic sheet should now be placed on top of the lid, so that it can be taken off while the substrates are still secure in the stack, thus avoiding damage to the substrates.
This video demonstrates how to load the high density OFET stack typically used to thermally evaporate (vacuum deposit) source-drain contacts. The video shows the below steps:
- Loading the interchangeable source-drain masks into the lower support (this is combined with the substrate holder).
- Loading the substrate
- Screwing the lid on.
- Adding the magnetic sheet
Learn more and get started with high density OFETs
The high density OFET fabrication system makes it simpler and quicker to make and test a large number of devices for statistical and optimisation purposes. Find our more by viewing our high density OFET overview and schematic, contact our OFET team or buy the high density OFET stack.
The mask is designed in such a way that during the deposition of the gate electrodes on the corner of the substrate the metal should cover the edge of the substrate as well. This ensures conductivity between the metal electrodes and the p-doped silicon. If you find the edges of the substrate not to be conductive you must scratch the edges of the substrate to remove the insulating silicon oxide in correspondence with the corner where the gate electrode will be deposited.
To the best of our knowledge the information provided here is accurate. The values provided are typical at the time of manufacture and may vary over time and from batch to batch. Products may have minor cosmetic differences (e.g. to the branding) compared to the photos on our website. All products are for laboratory and research and development use only.